1. Field
Embodiments of the present invention generally relate to the field of semiconductor manufacturing processes and devices.
2. Description of the Related Art
Integrated circuits may include more than one million micro-electronic field effect transistors or devices (e.g., complementary metal-oxide-semiconductor (CMOS) field effect transistors) that are formed on a substrate and cooperate to perform various functions within the circuit. A CMOS transistor comprises a gate structure disposed over a channel region formed between source and drain regions of the transistor. The gate structure generally comprises a gate electrode and a gate dielectric. The gate electrode is disposed over the gate dielectric and, in operation, is used to control a flow of charge carriers (i.e., electric current) in the channel region beneath the gate dielectric.
In conventional device formation, polysilicon layers are used as gate electrodes. However, the polysilicon layers must be doped in order to achieve a desired work function. Unfortunately, polysilicon gate electrodes suffer from a depletion effect. The depletion effect occurs when the portion of the gate electrode nearest an underlying oxide layer is depleted of dopants, causing the gate electrode layer to behave like an insulating layer, leading to device degradation and eventual malfunction. For high performance CMOS applications where high-k layers are applied, the polysilicon gate interacts with the high-k film, resulting high threshold voltage and poor transistor drive performance.
To overcome these deficiencies, metal gate electrodes may be used in place of polysilicon gate electrodes. However, conventional materials used in metal gate electrodes typically have a limited work function tuning range, making the selection of material limited for each individual need.
Therefore, there is a need in the art for improved methods for forming a gate electrode having a tunable work function.